Pyxis Technology, Inc.

High Performance IC Routing
Best-in-Class Timing, Throughput, Power & Yield

DAC 2008 Demo Appointment Registration

Note: to see both demos you must register for them separately

Demo 1: Using High Performance Routing for 45nm Design Closure

This demonstration will give a high level overview of the Pyxis NexusRoute architecture and features, giving quantitative examples of how the tool has been used on designs from companies such as Microsoft to improve IC routability, performance, power and predicted yield. The demonstration will highlight key architectural features required for 45nm design closure and contrast these with existing router architectures. Lastly a short discussion will be given on how the router has been successfully integrated into design flows to leverage the existing optimization and ECO capabilities of larger EDA companies.

Demo 2: High Performance Routing for Structured Custom Design and Chip Finishing

This demonstration will give a high level overview of how the Pyxis NexusRoute architecture uses the OpenAccess in-memory runtime model to seamlessly integrate with other tool environments. The demonstration highlights the integration of NexusRoute with the Laker chip editing tool from Silicon Canvas and shows examples of the combined power of a next generation 45nm IC digital router in rich full-custom layout environment.