Company Overview

Pyxis was founded in March 2004 and brings extensive experience in high performance chip design and algorithmically complex software development from previous companies such as IBM, Sun Microsystems, and Motorola. Using Pyxis software, designers will achieve better routability, faster IC performance, lower power, and better yield. Pyxis’ next generation auto-router is designed to efficiently solve the problems arising from physical effects of < 65nm technologies while blending seamlessly into the common EDA environments of IC design customers.

Pyxis Management Team

Phil Bishop is the President and CEO at Pyxis and has over 25 years of experience in high technology industries. Prior to joining Pyxis, Phil spent five years in England as the president and CEO of Celoxica Holdings Plc. While at Celoxica, he forged worldwide technology and business partnerships, grew revenue five fold, and took the company public. Phil has been active on a number of technology company boards, including a non-executive chairman of the board role for Silistix Inc., a provider of integrated circuit (IC) interconnection software. Previous to Celoxica, Phil worked 12 years for Mentor Graphics Corporation (Nasdaq: MENT) in Wilsonville, Oregon, leaving as the Vice President and General Manager of worldwide consulting. At Mentor Graphics, Phil globalized the consulting organization and directed the organization to large increases in revenue and gross margin. Phil has also held engineering and management roles at Motorola Semiconductor/ Freescale Semiconductor, Inc. and Boeing. Phil has a MBA in Global and International business from Duke University, and has a B.Sc. in electrical engineering and a B.Sc. in computer engineering from the University of Michigan.

P.T. Patel, founder, executive vice president and CTO, brings over 30 years of microprocessor physical design expertise to the company. Before founding Pyxis, PT spent three years at Sun Microsystems where he was Senior Distinguished Engineer, responsible for setting the vision for microprocessor tools and methodologies for 65nm & below technologies. Prior to Sun, PT was with IBM for 27 years where he served as Distinguished Engineer and led the physical design effort for the Power PC family of microprocessors. He developed structured design methodologies targeted towards reducing total time to market and provided technical leadership for physical design tools development at IBM. PT is a recipient of Corporate and Outstanding Technical Achievement awards from IBM for designs, tools and methodology innovations for Power and PowerPC microprocessors. He received the Chairman’s Award at Sun for CAD tools and methodology innovations. He has been granted 16 U.S. patents and has several publications on chip design, tools and methodology. PT has an MS degree in electrical engineering from University of Connecticut.

Mitch Heins, vice president of business development, has worked in the semiconductor and EDA industries for over 22 years. Prior to joining Pyxis, Heins was senior director of silicon operations and products for HPL Technologies, Inc., responsible for all business activities of HPL’s test chip division, including product development, marketing, and sales support. Before joining HPL, Heins served as director of applications support and services for Petersen Advanced Lithography. He has also held positions as vice president of strategic third party alliances for Cadence Design Systems and director of ASIC business development for Ambit Design Systems. At the CAD Framework Initiative, Inc., a consortium focused on software standards for plug-and-play EDA tools (now called the Si2, the Silicon Integration Initiative), Heins held the position of director of marketing. From 1983 to 1995, he worked in various positions at Texas Instruments, ending his tenure as EDA strategy and business development manager.

John Ennis, vice president of sales, brings 20 years of sales experience to Pyxis Technology, Inc. His proven track record includes building significant year-to-year revenue gains in both software sales and maintenance and service contracts. John joins Pyxis Technology from ClearShape Technology where he spear-headed Business Development activities. John started his career at Rockwell International as Sr. Design Engineer and proceeded to take on a Design Management position at Analog Devices. John was nominated to "Who’s Who" for consistent success and notoriety in the Southern California electronics industry. In 1986 John took on the responsibility for the sales of CAE software at Cadence Design Systems and managed to exceed 100% of quota over a period of 8 years. After his tenure at Cadence, John became Vice President of Sales (TCAD Division) at Avant!/TMA which was later sold to Synopsys. John was able to develop successful relationships with the top 10 accounts, including Intel, TI, Motorola, Philips, AMD, LSI and others, resulting in the largest deal in Avant!’s history. John held Vice President of Wordwide Sales positions at both Circuit Semantics and Anchor Semiconductor in Northern California. John holds a B.S. degree in Electrical Engineering, Summa Cum Laude, from the University of Trenton State.

Sharad Mehrotra, cofounder and vice president of engineering, has worked in EDA tool development for physical design and analysis for over 10 years. He led a number of tool development projects at IBM and Sun in the area of interconnect RLC extraction, noise analysis, physical design infrastructure and global and detail routing for microprocessor and ASIC methodologies. He worked in these projects from concept and specification through development and deployment of the tools. Sharad has a Ph.D. in Electrical Engineering from North Carolina State University (Raleigh), an M.S. EE from Vanderbilt University (Nashville, TN) and a B.Tech. EE from Indian Institute of Technology (Kanpur, India). He has 15 publications in IEEE Conferences and Journals and holds 12 U.S. patents. Sharad received Outstanding Technical Achievement awards at IBM for his contributions to EDA tool development and deployment.

Joe Rahmeh, cofounder and engineering fellow, has over 15 years of experience in EDA tool development at SUN Microsystems, Monterey Design, and as a consultant to IBM’s PowerPC design team. He has been a key architect and developer of static timing analysis, noise analysis, clock tree synthesis, test pattern generation, and simulation tools for system level performance modeling. Prior to his career in EDA tool development, Joe spent four years as an Assistant Professor at the University of Texas in Austin, where he taught graduate and undergraduate courses in the electrical engineering department. During that time he supervised graduate research in the areas of computer architecture and computer aided design. Joe has a Ph.D. in Electrical Engineering from the University of Illinois. He has authored over thirty technical papers in the CAD area.